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Senior R&D Engineer...Timing Closure Specialist
Job Location :
Valley or Anywhere
San Jose or Anywhere, CA 95119
United States





EDA Careers
San Jose, CA 95119
United States
Employment term : Full Time
Degree : Masters
Travel : Light < 25%
Job level : Mid Level 2-6 yrs.
Work Authorization :
  • Authorized to work
  • USA: Citizen
  • USA: Green Card holder
  • USA: H-1 Visa Holder
  • Senior R&D Engineer...Timing Closure Specialist  #4112

    This established Start-Up is known for solving Timing Closure and Timing Constraints problems from RTL to GDS2. Timing closure, timing constraints are huge problems and this company has complete working end to end, front to back solutions. SDC is the end game and it is their goal to make sure that the SDC is clean and ready for tape out. They need skilled ASIC VLSI Engineers with a good physical flow background to help build and improve their product.

    Candidate must be a Programmer with a minimum of about 3-years-experience, that has worked with ASIC Digital Physical Flows and is strong in timing closure issues.  You will edit timing constraints in Primetime, possibly use QT for their GUI’s, and of course, C++ for programming.  TCL and/or PERL is essential as well. 

    Location is flexible including the possibility of remote, for the right candidate. 

    Send resume to Apply Here then call 305-598-2222

    EDA Careers Profile:

    EDA-CAREERS is a unique company in the world of recruiting. With over 15 years in recruiting exclusively in the EDA/Semiconductor industry, we pride ourselves on our relationships. We WORK to help find the best fits for our companies and the best opportunities for our candidates. In effect, we become PARTNERS, so that both the candidate and the company process goes smoothly from beginning to end. That is why we have worked with over One Hundred companies in EDA, and placed such a broad array of candidates.  We do it all...R&D, AE's, Sales and Marketing.  We help virtually every level of talent and work Globally.

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