Job Search | Job Seekers | EmployersLogin   
  Email this Job   print   

Senior and (less) Senior Design Verification Engineers
Job Location :
Valley
San Jose and Austin, California 95119
United States

 

 

 

 

EDA Careers
Valley
San Jose, CA 95119
United States
http://www.eda-careers.com
Employment term : Full Time
Degree : Masters
Travel : Light < 25%
Job level : Senior Level 7+ yrs.
Work Authorization :
  • Authorized to work
  • USA: Citizen
  • USA: Green Card holder
  • USA: H-1 Visa Holder
  • Senior and (less) Senior Design Verification Engineers

    Austin #5316 and #5318

    My client is looking for FT Verification Engineers in both Austin and the Valley.  They want folks that can contribute to the backbone of some of the world's most popular SoCs? You will work with an expert team to design and deliver interconnect & memory hierarchy solutions for some of the world's most sophisticated mobile, telecom, automotive, and consumer SoC designs. You'll create and work with existing verification methodologies for their designs that are developed in languages that blend traditional RTL with leading-edge software, to provide extremely configurable, testable, and high-quality solutions. You’ll go home at the end of the day amazed at all the places where your creations end up. You will have the opportunity to be part of a proven-successful startup, and to influence development environment, architecture, verification, and everything in-between – you’ll no longer be stuck in a silo or just a cog in the machine.

    Responsibilities:

    • Advanced UVM based testbench development and debugging
    • Define, document, develop and execute RTL verification test/coverage at sys level
    • Performance verification and power-aware verification
    • Triaging Regressions, Debugging RTL designs in Verilog and SystemVerilog 
    • Help improve and refine verification process, methodology, and metrics
    • UVM expertise on complex SoC projects from test bench development to verification closure

    Skills and Qualifications:

    • 7+ years of design and verification experience, (3-5 for less Senior)...a plus in interconnect verification experience
    • Verification flow enhancements using scripting language such as Shell, Python & JavaScript
    • Strong RTL (Verilog) and UVM/C test bench debugging skills
    • Experience integrating vendor provided VIPs for unit and system level verification
    • Experience with Arm AMBA protocols
    • This opportunity involves high performance, low power designs on a highly visible project

     H-1b transfers accepted


    EDA Careers Profile:

    EDA-CAREERS is a unique company in the world of recruiting. With over 15 years in recruiting exclusively in the EDA/Semiconductor industry, we pride ourselves on our relationships. We WORK to help find the best fits for our companies and the best opportunities for our candidates. In effect, we become PARTNERS, so that both the candidate and the company process goes smoothly from beginning to end. That is why we have worked with over One Hundred companies in EDA, and placed such a broad array of candidates.  We do it all...R&D, AE's, Sales and Marketing.  We help virtually every level of talent and work Globally.

      Email this Job   print   



    © 2020 Internet Business Systems, Inc.
    25 North 14th Steet, Suite 710, San Jose, CA 95112
    +1 (408) 882-6541 — Contact Us, or visit our other sites:
    AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
      Privacy PolicyAdvertise